1. Field of the Invention
The present invention relates to circuit and method for generating a timing signal and signal transmission system, and more particularly, to a signal transmission system that performs high-speed signal transmission and reception between LSIs (Large Scale Integration Circuits) or between apparatuses.
2. Description of the Related Art
Recently, the performance of components used in computers and other information processing apparatuses has been greatly improved. In particular, dramatic improvements have been made, for example, in the performance of processors and semiconductor memory devices such as SRAMs (Static Random Access Memories) and DRAMs (Dynamic Random Access Memories). The improvements in the performance of semiconductor memory devices, processors, and the like have come to the point where system performance cannot be improved further unless the speed of signal transmission between components or elements is increased.
Specifically, in recent years, with increasing operating speeds of LSIs, signal transmission systems that perform large-capacity signal transmission using a plurality of signal lines have come to be used widely for signal transmission between LSIs or between apparatuses constructed with a plurality of LSIs. However, in such signal transmission systems using a plurality of signal lines, as the transmission speed increases, the difference (skew) in signal propagation delay between the signal lines becomes a problem, making accurate signal transmission difficult. It is therefore desired to provide a signal transmission system that can perform large-capacity signal transmission accurately and at high speed by using a plurality of signal lines.
The prior art and the problems associated with the prior art will be described in detail later with reference to accompanying drawings.